Sharp FO-6700 Service Manual Page 72
- Page / 192
- Table of contents
- TROUBLESHOOTING
- BOOKMARKS
Rated. / 5. Based on customer reviews
FO-6700U
FO-67DL
5 – 16
[3] Circuit description of Line Control PWB
1. General description
The Line Control PWB is composed of the following blocks.
Sub CPU Block Gate Array (A) Block
Modem Block JBIG Block
Sub EPROM, DRAM Block
Dual Port RAM Block
Connector Block (CNSUB)
Sub Access Control Block
(1) Sub CPU Block
The Sub Control Block uses RISC microprocessor HD6437021 as CPU,
being composed of ROM (1 MByte) and DRAM (2 MByte).
1) HD6437021 (IC15): pin-100, QFP (Main CPU)
The device is a microprocessor which integrates the peripheral func-
tions, using CPU of 32-bit RISC type as the core. In the instrument, the
following peripheral functions are mainly used.
ROM of 32 KByte and RAM of 1 KByte are integrated.
A part of programs are stored in the integrated ROM.
DMA Controller (4 channels are provided, and 2 channels alone are
used.)
ch.0: Used to transmit coding image data between QM-CODER (IC3)
and DRAM(IC10).
ch.1: Used to transmit image data between QM-CODER and
DRAM(IC10).
Clock-synchronous type serial communication interface commands
and statuses are communicated with PCU.
Interruption
IRQ4: Interruption request from Gate Array (A) (LZ9FJ59)
IRQ6: Interruption request from Modem.
IRQ7: Interruption request from Dual Port RAM.
IRQ0, IRQ1, IRQ2, IRQ3, IRQ5: Not used.
NMI : Not used.
DRAM Controller
Addressing to DRAM(IC10) of the system and control and refresh
control of RAS and CAS signals are executed.
Timer and Watch Dog Timer
General-purpose I/O Port
Control of LIU are executed.
Clock Oscillation
Ceramic oscillator of 19.66 MHz is connected for operation of 19.66
MHz.
- SERVICE MANUAL 1
- FACSIMILE 1
- CONTENTS 3
- [1] Specifications 4
- 28 29 30 31 32 33 5
- 40393837363534 5
- CHAPTER 2. ADJUSTMENTS 9
- MEMORY CLEAR ? 10
- 1) Soft switch mode 11
- 2) Print area 11
- 3) ROM & RAM check 11
- After setup of the document 12
- Only the sensor which is 12
- SPEED key SXXX XXX 13
- : Speed key number 13
- 2-2. Print diagnosis 15
- • Blank paper aging mode 15
- • SW1 to SW30 : For line 1 17
- • SW31 to SW60 : For line 2 17
- 4. Soft switch description 18
- • Soft switch 18
- [3] Troubleshooting 44
- [4] Error code table 45
- Super G3 mode 46
- 2. Service call error massage 46
- Wire treatment 52
- [1] Block diagram 53
- [2] Wiring diagram 54
- [1] Circuit description 57
- (8) Gate Array (B) Block 64
- (9) CODEC Block 66
- (10) Page Memory Block 69
- (11) Driver Block 70
- (12) DPRAM I/F Block 71
- 1. General description 72
- (1) Sub CPU Block 72
- (2) Modem Block 75
- (8) JBIG Block 80
- IC3: VHiM65761FP-1(M65761FP) 80
- CPU & memory block 82
- Flash memory block 3/16 84
- Reading block 4/16 85
- Gate array (B) block 7/16 88
- Codec block 8/16 89
- Page memory block 9/16 90
- Other block 14/16 95
- Connector block 1 15/16 96
- FO-6700U 100
- Modem block 2/7 101
- Gate array block 3/7 102
- QM-coder block 4/7 103
- Dual port RAM block 5/7 104
- Access control block 6/7 105
- Connector block 7/7 106
- LIU PWB parts layout 109
- Printer PWB circuit 2/2 111
- T1 7 8 – 9 114
- T1 2 – 3 114
- Power Supply PWB parts layout 115
- High Voltage PWB parts layout 119
- Toner Empty PWB parts layout 120
- Memory PWB circuit 2/3 126
- Memory PWB circuit 3/3 127
- [1] G3 Protocol 129
- [2] Super G3 Protocol 130
- [3] Power On Sequence 131
- CHAPTER 8. OTHERS 132
- 2. Description 133
- For inspection 135
- [2] IC Signal Names 137
- 8 7 5 8 B 138
- PRINTER PWB UNIT 139
- 16 15 14 13 12 11 10 9 142
- 1 2 3 4 5 6 7 8 142
- 1C 2C 3C 4C 5C 6C 7C COM 142
- 1B 2B 3B 4B 5B 6B 7B E 142
- PARTS GUIDE 143
- [12] 2nd.Cassette (1) 158
- I n d e x 184
- © 2000 BY SHARP CORPORATION 192
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