Sharp ER-A770 Service Manual download pdf (Page 40)

Programming the CTC is straightforward: each channel is pro-

grammed with two bytes: a third is necessary when interrupts are

enabled. Once started, the CTC counts down, automatically reloads

its time constant, and resumes counting. Software timing loops are

completely eliminated. Interrupt processing is simplified because only

one vector need be specified: the CTC internally generates a unique

vector for each channel.

The Z80 CTC requires a single +5% V power supply and the standard

Z80 single-phase system clock. It is packaged in 28-pin DIPs, a 44-

pin plastic chip carrier, and a 44-pin Quad Flat Pack. (Figures 2a, 2b,

and 2c). Note that the QFP package is only available for CMOS

versions.

3) Pin configuration

4) Functional description

The Z80 CTC has four independent counter/timer channels. Each

channel is individually programmed with two words: a control word

and a time-constant word. The control word selects the operating

mode (counter or timer), enables or disables the channel interrupt,

and selects certain other operating parameters. If the timing mode is

selected, the control word also sets a prescaler, which divides the

system clock by either 16 or 256. The time-constant word is a value

from 1 to 256.

During operation, the individual counter channel counts down from

the preset time constant value. In counter mode operation the counter

decrements on each of the CLK/TRG input pulses until zero count is

reached. Each decrement is synchronized by the system clock. For

counts greater than 256, more than one counter can be cascaded. At

zero count, the down-counter is automatically reset with the time

constant value.

The timer mode determines time intervals as small as 2 µs (8 MHz), 3

µs (6 MHz), or 4 µs (4 MHz) without additional logic or software timing

loops. Time intervals are generated by dividing the system clock with

a prescaler that decrements a preset down-counter.

Thus, the time interval is an integral multiple of the clock period, the

prescaler value (16 or 256), and the time constant that is preset in the

down-counter. A timer is triggered automatically when its time con-

stant value is programmed, or by an external CLK/TRG input.

Three channels have two outputs that occur at zero count.

The first output is a zero-count/timeout pulse at the ZC/TO output.

The fourth channel (Channel 3) does not have a ZC/TO output;inter-

rupt request is the only output available from Channel 3.

The second output is Interrupt Request (

INT), which occurs if the

channel has its interrupt enabled during programming. When the Z80

CPU acknowledges Interrupt Request, the Z80 CTC places an inter-

rupt vector on the data bus.

The four channels of the Z80 CTC are fully prioritized and fit into four

configuous slots in a standard Z80 daisy-chain interrupt structure.

Channel 0 is the highest priority and Channel 3 the lowest. Interrupts

can be individually enabled (or disabled) for each of the four chan-

nels.

5) Pin description

No.

Symbol

Signal

name

In/Out Function

1 D0 S D0 In/Out Data bus

2 D1 S D1 In/Out Data bus

3 D2 S D2 In/Out Data bus

4 D3 S D3 In/Out Data bus

5NC NC —NC

6NC NC —NC

7NC NC —NC

8 D4 S D4 In/Out Data busj*9

10 D6 S D6 In/Out Data bus

11 NC NC — NC

12 D7 S D7 In/Out Data bus

13 GND GND — GND

RD S RDS In Read cycle status signal

15 NC NC — NC

16 ZC/TO0 S TM0 Out Zero count / Timeout signal

17 NC NC — NC

18 ZC/TO1 NC — NC

19 ZC/TO2 NC — NC

20 NC NC — NC

IORQ S IORQ In Input / Output request signal

22 IEO NC — NC

INT S INT Out Interrupt request signal

24 NC NC — NC

25 IEI VCC — +5V

26 NC NC — NC

M1 S M1 In Machine cycle one signal

28 NC NC — NC

29 CLK CLK In System clock

30 NC NC — NC

CE S A6 In Chip enable signal

RESET S RES In Reset signal

33 CS0 S A0 In Channel select signal

34 NC NC — NC

CLK GND

CHANNEL

SIGNALS

CTC

CONTROL

FROM

CPU

DAISY

CHAIN

INTERRUPT

CONTROL

CPU

DATA

BUS

ZC/TO0

CLK/TRG1

ZC/TO1

CLK/TRG2

ZC/TO2

CLK/TRG3

Z80 CTC

CS0

CS1

IORQ

IEO

CLK/TRG0

RESET

INT

IEI

+5V

Figure 1. Pin Functions

2333

ZC/TO2

ZC/TO1

ZC/TO0

GND

IEO

IORQ

CLK/TRG3

CLK/TRG2

CLK/TRG1

CLK/TRG0

+5V

CSI

CMOS

Z80 CTC

Figure 2c. 44-pin Quad Flat Pack Pin Assignments

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 88 89

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Sharp ER-A770 Service Manual Page 40

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