Sharp MZ-3500 User Manual Page 78
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M7 3500
8 4 System SW1 (DIP SW) (User operative through the cabinet bottom)
No
Signal name
Function
Position Polarity
Description
SW1
SW2
ON
OFF
Printer select
ON
OFF
SW2
SWl
ON ON CE332P
OFF ON MZ1P02
ON OFF
102824
OFF OFF
-
#47 pin of MMR
#48 pm of MMR
ON
High resolution CRT (MZ1D02, MZ1D03)
SW3
CRT select
OFF
Medium resolution CRT (MZl 001, M21D06)
#51 pin of MMR
SW4
Choice of decimal
point output
format
ON
A period IS output for a decimal point
OFF
A comma is outputted for a decimal point
#52 pin of MMR
SW5
SW6
SW7
ON
Low state or open ER signal during data output
will result in an error
OFF
The signal ER becomes invalid
ON
RS232C
assign
CD IS high as long as power is on to the mam
unit
OFF
CD goes high only during data output Flowever,
It would not go high if the echo back function is
on the host side
ON
An error IS cause when the PO signal is high
during data output
OFF
Polarity IS inverted for the above
To CTS, DSR
of the 8251
To CTS of the
8251
ON
FD1
(SW8)
Key shift mode
setup
Normally in capital letter, but in small letter
when shifted
OFF
Normally small leter and in capital letter when
shifted
#54 pin of MMR
(FDD
ON
P/M
(SW9)
Choice of CG
for display
3500 CG will be assigned when the 200 raster
CRT IS in use
OFF
2000 CG will be assigned when the 200 raster
CRT IS in use
Dip switches (A) and (B) located on the PWB are used for
servicing the MFD or for other machine service and there
fore the user is not supposed to use these switches In
addition, these switch must be used when either the CE
330M or 331M IS used as the expansion MFD
DIP SW (A)
No Stgnal n^ne
1
SEC
(SW1A)
44 pm of MMR
2
FD2
(SW2A)
56 pm of MMR
3
FD3
(SW3A)
58 pm of MMR
4
SRQ
(SW4A)
Bus request
to sub-CPU
DIP SW (B)
No
Signal name
1
SRES
(SW1B)
SUB CPU
reset signal
2 SW2B
SUB CPU BUS
select signal
P/M signal
(To A3 CG)
1
2 3
OFF OFF OFF When SH m use
ON OFF OFF When DH m use
OFF
ON OFF
—
ON ON OFF
—
OFF
OFF
ON
Use of the CE330M as an expansion unit
ON OFF
ON
Use of the CE331M as an expansion unit
OFF
ON ON Check mode * 1
ON ON ON
Check mode *2
*1 Test program is loaded and executed
*2 Provided for the test of the MFD interface The
read/write test is carried out for the expansion unit
Used for an individual test of the CPU PWB When these
three switches are turned off altogether, it makes the
sub CPU operated independently To be used in th ON
condition under a normal situation
- SERVICE MANUAL 1
- 1. SPECIFICATIONS 2
- Keyboard layout 3
- 1-3. MZ-1U02 3
- 1-4. MZ-IR03 4
- 1-6. MZ-1R06 5
- 1-7. MZ-1D07 6
- 2-1. SDO (INITIALIZE STATE) 8
- MAIN CPU 8
- M* )S V 1 M/} 9
- MZS.'tOO 10
- 2.3. SD2 (ROM based BASIC) 11
- Operational description 12
- 3. CPU AND MEMORY 13
- L© 'MTR ! 14
- 3-3. Sub CPU and I/O port 15
- 1) Block diagram 16
- ‘ VK IN MEMCKT MM I Mf 20
- 4. CRT DISPLAY 22
- X 25 lines screen.) 24
- For Model 3200 senes 26
- 4-2. Video RAM 27
- 5) Synchronize signal timing 30
- X : Y - 1 : 2 30
- X : Y : 1 : 1 31
- 'iBK byte 32
- (option I) 32
- 48K byte 32
- (option tl) 32
- M Z 3500 34
- CSP 2 Block Diagram 37
- 20 GND IN 38
- ASCII C.G. Structure 40
- 4 9. VSYNC 41
- ARIO = HI 42
- > FIFO Empty? 44
- [Explanation] 45
- Straight line drawing 46
- Whereas 46
- 5. MFD INTERFACE 47
- ^ 0 ^ 0 1 49
- 8) Data write procedure 50
- 5^. FDC (UPD765) 52
- UPD765 signal description 53
- 5-5. Data recording method 54
- <ITE DATA 55
- Write pulse [] fl d fl R 56
- Polarity inversion 56
- +5V RtAD DATA 57
- M -- 3.1 58
- ©"T 58
- Advanced 59
- Does not trace i l^is 59
- 5-11. Media format 60
- (Bbyles) 61
- 02 0\ FF FF 62
- ( 2KX 152 = 304K ) 63
- Stop bit 64
- 6-4. System switch functions 65
- 6-5. 8251AC controls 65
- 2) Data output control 66
- 3) Data input control 67
- 7-D0C># 68
- 3iil>CPU of Ni^ 70
- <i> 71
- 7 4. Data transfer timing 72
- 7-6. I/O port map 73
- 8. OTHER INTERFACES 74
- -<3 ri> 75
- MZ,"500 76
- DIP SW(A) 79
- 1. BLOCK DIAGRAM 80
- A. +5V and +12V supplies 80
- M 7,3500 81
- 3. Alarm circuit 82
- DESCRIPTION 83
- 10-2. Key search timing 84
- JLJl_JlJT_ri_rLJl 85
- Power ON 86
- START (5mS) 86
- 11. SELF CHECK FUNCTIONS 87
- CD SDO bank alternation error 88
- 11-2. Sub-CPU side 89
- .8 test the 90
- 20 lines 90
- /<.y ^ Jf -y > K W 91
- 8) ROM-IPL 92
- S3Si-54Kl=-.*- • 93
- 12. IPL FLOW CHART 96
- MAIN CPU IPL FLOW CHART 2/2 97
- 12 2. SUB CPU IPL FLOW CHART 98
- ■ I I Y Y TV 99
- IjJliJlJjljJljJLllLljLLJ 99
- LlJ LiJ LiJ Lei LiJ LLl LiJ 99
- LJLeJ'LDliJLiJLLjLJLiJ 99
- Pi co vO co fO Pi 100
- Ч Г ^n UO 100
- ¿. ^ О 101
- Û. CM Û 101
- GUIDE LIST 102
- I'l Exteriors 103
- 1 Exteriors 104
- PWB & Fixing angles 105
- [3 Connector 106
- [4] Others 107
- 5 CPU PWB 107
- 5I CPU PWB 108
- U Power supply unit 108
- [6j Power supply unit 109
- П MZ1R06 (RAM board) 111
- SHARP CORPORATION 116
- Industrial Instruments Group 116
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